One time programmable (OTP) and multi-time programmable (MTP) memories have been recently introduced for beneficial use in a number of applications where customization is required for both digital and analog designs. These applications include data encryption, reference trimming, manufacturing identification (ID), security ID, and many other applications. Incorporating OTP and MTP memories nonetheless typically comes at the expense of some additional processing steps.
For example, OTP and MTP memories may include flash memory devices that store data on an array of programmable memory cells. Typically, these cells are made from floating-gate metal oxide semiconductor field effect transistors (MOSFETs) that can be electrically erased and reprogrammed. The floating gate FET includes a source region, a drain region, and a channel electrically coupling the two regions. A double polysilicon gate structure is disposed normally over the channel, and includes a control gate, and a floating gate disposed under the control gate and isolated by oxide layers, such that the floating gate is electrically isolated from the channel and the control gate. Because the floating gate is electrically isolated, any electrons placed in this layer are trapped, and will remain trapped under normal conditions for many years. The control gate is capacitively coupled to the floating gate. Programming, erasing, and reading the MOSFET is achieved by applying various voltages between the control gate, source region, and drain region in different combinations.
Numerous steps are implemented to fabricate one or more MOSFETs on a silicon wafer. These include various deposition, removal, patterning, and masking steps to grow the features of the MOSFET, including the drain and source regions, the floating gate oxide layer, and the control gate oxide layer. For a typical flash memory cell having a double polysilicon gate structure, it may take up to 20 or more masking steps. Each subsequent masking step will increase the fabrication cost and also degrade the quality of the transistors. As such, for embedded applications, the use of flash memory fabricated onto portions of the silicon chip may be too costly for the function provided, and may affect the quality of all the active transistors on the chip.
It is desirous to achieve a floating gate memory device without a double polysilicon gate structure.